| entry-armv.S (a611fb75d0517fce65f588cde94f80bb4052c6b2) | entry-armv.S (11b8b25ce4f8acfd3b438683c0c9ade27756c6e8) |
|---|---|
| 1/* 2 * linux/arch/arm/kernel/entry-armv.S 3 * 4 * Copyright (C) 1996,1997,1998 Russell King. 5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk) 6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Low-level vector interface routines 13 * 14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction 15 * that causes it to save wrong values... Be aware! 16 */ 17 | 1/* 2 * linux/arch/arm/kernel/entry-armv.S 3 * 4 * Copyright (C) 1996,1997,1998 Russell King. 5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk) 6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Low-level vector interface routines 13 * 14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction 15 * that causes it to save wrong values... Be aware! 16 */ 17 |
| 18#include <linux/init.h> 19 | |
| 20#include <asm/assembler.h> 21#include <asm/memory.h> 22#include <asm/glue-df.h> 23#include <asm/glue-pf.h> 24#include <asm/vfpmacros.h> 25#ifndef CONFIG_MULTI_IRQ_HANDLER 26#include <mach/entry-macro.S> 27#endif --- 9 unchanged lines hidden (view full) --- 37 38/* 39 * Interrupt handling. 40 */ 41 .macro irq_handler 42#ifdef CONFIG_MULTI_IRQ_HANDLER 43 ldr r1, =handle_arch_irq 44 mov r0, sp | 18#include <asm/assembler.h> 19#include <asm/memory.h> 20#include <asm/glue-df.h> 21#include <asm/glue-pf.h> 22#include <asm/vfpmacros.h> 23#ifndef CONFIG_MULTI_IRQ_HANDLER 24#include <mach/entry-macro.S> 25#endif --- 9 unchanged lines hidden (view full) --- 35 36/* 37 * Interrupt handling. 38 */ 39 .macro irq_handler 40#ifdef CONFIG_MULTI_IRQ_HANDLER 41 ldr r1, =handle_arch_irq 42 mov r0, sp |
| 45 badr lr, 9997f | 43 adr lr, BSYM(9997f) |
| 46 ldr pc, [r1] 47#else 48 arch_irq_handler_default 49#endif 509997: 51 .endm 52 53 .macro pabt_helper --- 216 unchanged lines hidden (view full) --- 270 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 271 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 272 blo __und_svc_fault 273 ldrh r9, [r4] @ bottom 16 bits 274 add r4, r4, #2 275 str r4, [sp, #S_PC] 276 orr r0, r9, r0, lsl #16 277#endif | 44 ldr pc, [r1] 45#else 46 arch_irq_handler_default 47#endif 489997: 49 .endm 50 51 .macro pabt_helper --- 216 unchanged lines hidden (view full) --- 268 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 269 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 270 blo __und_svc_fault 271 ldrh r9, [r4] @ bottom 16 bits 272 add r4, r4, #2 273 str r4, [sp, #S_PC] 274 orr r0, r9, r0, lsl #16 275#endif |
| 278 badr r9, __und_svc_finish | 276 adr r9, BSYM(__und_svc_finish) |
| 279 mov r2, r4 280 bl call_fpe 281 282 mov r1, #4 @ PC correction to apply 283__und_svc_fault: 284 mov r0, sp @ struct pt_regs *regs 285 bl __und_fault 286 --- 118 unchanged lines hidden (view full) --- 405 ATRAP( mcrne p15, 0, r8, c1, c0, 0) 406 407 @ 408 @ Clear FP to mark the first stack frame 409 @ 410 zero_fp 411 412 .if \trace | 277 mov r2, r4 278 bl call_fpe 279 280 mov r1, #4 @ PC correction to apply 281__und_svc_fault: 282 mov r0, sp @ struct pt_regs *regs 283 bl __und_fault 284 --- 118 unchanged lines hidden (view full) --- 403 ATRAP( mcrne p15, 0, r8, c1, c0, 0) 404 405 @ 406 @ Clear FP to mark the first stack frame 407 @ 408 zero_fp 409 410 .if \trace |
| 413#ifdef CONFIG_IRQSOFF_TRACER | 411#ifdef CONFIG_TRACE_IRQFLAGS |
| 414 bl trace_hardirqs_off 415#endif 416 ct_user_exit save = 0 417 .endif 418 .endm 419 420 .macro kuser_cmpxchg_check 421#if !defined(CONFIG_CPU_32v6K) && defined(CONFIG_KUSER_HELPERS) && \ --- 44 unchanged lines hidden (view full) --- 466 @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the 467 @ faulting instruction depending on Thumb mode. 468 @ r3 = regs->ARM_cpsr 469 @ 470 @ The emulation code returns using r9 if it has emulated the 471 @ instruction, or the more conventional lr if we are to treat 472 @ this as a real undefined instruction 473 @ | 412 bl trace_hardirqs_off 413#endif 414 ct_user_exit save = 0 415 .endif 416 .endm 417 418 .macro kuser_cmpxchg_check 419#if !defined(CONFIG_CPU_32v6K) && defined(CONFIG_KUSER_HELPERS) && \ --- 44 unchanged lines hidden (view full) --- 464 @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the 465 @ faulting instruction depending on Thumb mode. 466 @ r3 = regs->ARM_cpsr 467 @ 468 @ The emulation code returns using r9 if it has emulated the 469 @ instruction, or the more conventional lr if we are to treat 470 @ this as a real undefined instruction 471 @ |
| 474 badr r9, ret_from_exception | 472 adr r9, BSYM(ret_from_exception) |
| 475 476 @ IRQs must be enabled before attempting to read the instruction from 477 @ user space since that could cause a page/translation fault if the 478 @ page table was modified by another CPU. 479 enable_irq 480 481 tst r3, #PSR_T_BIT @ Thumb mode? 482 bne __und_usr_thumb 483 sub r4, r2, #4 @ ARM instr at LR - 4 4841: ldrt r0, [r4] 485 ARM_BE8(rev r0, r0) @ little endian instruction 486 487 @ r0 = 32-bit ARM instruction which caused the exception 488 @ r2 = PC value for the following instruction (:= regs->ARM_pc) 489 @ r4 = PC value for the faulting instruction 490 @ lr = 32-bit undefined instruction function | 473 474 @ IRQs must be enabled before attempting to read the instruction from 475 @ user space since that could cause a page/translation fault if the 476 @ page table was modified by another CPU. 477 enable_irq 478 479 tst r3, #PSR_T_BIT @ Thumb mode? 480 bne __und_usr_thumb 481 sub r4, r2, #4 @ ARM instr at LR - 4 4821: ldrt r0, [r4] 483 ARM_BE8(rev r0, r0) @ little endian instruction 484 485 @ r0 = 32-bit ARM instruction which caused the exception 486 @ r2 = PC value for the following instruction (:= regs->ARM_pc) 487 @ r4 = PC value for the faulting instruction 488 @ lr = 32-bit undefined instruction function |
| 491 badr lr, __und_usr_fault_32 | 489 adr lr, BSYM(__und_usr_fault_32) |
| 492 b call_fpe 493 494__und_usr_thumb: 495 @ Thumb instruction 496 sub r4, r2, #2 @ First half of thumb instr at LR - 2 497#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 498/* 499 * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms --- 19 unchanged lines hidden (view full) --- 519ARM_BE8(rev16 r5, r5) @ little endian instruction 520 cmp r5, #0xe800 @ 32bit instruction if xx != 0 521 blo __und_usr_fault_16 @ 16bit undefined instruction 5223: ldrht r0, [r2] 523ARM_BE8(rev16 r0, r0) @ little endian instruction 524 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 525 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update 526 orr r0, r0, r5, lsl #16 | 490 b call_fpe 491 492__und_usr_thumb: 493 @ Thumb instruction 494 sub r4, r2, #2 @ First half of thumb instr at LR - 2 495#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 496/* 497 * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms --- 19 unchanged lines hidden (view full) --- 517ARM_BE8(rev16 r5, r5) @ little endian instruction 518 cmp r5, #0xe800 @ 32bit instruction if xx != 0 519 blo __und_usr_fault_16 @ 16bit undefined instruction 5203: ldrht r0, [r2] 521ARM_BE8(rev16 r0, r0) @ little endian instruction 522 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 523 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update 524 orr r0, r0, r5, lsl #16 |
| 527 badr lr, __und_usr_fault_32 | 525 adr lr, BSYM(__und_usr_fault_32) |
| 528 @ r0 = the two 16-bit Thumb instructions which caused the exception 529 @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc) 530 @ r4 = PC value for the first 16-bit Thumb instruction 531 @ lr = 32bit undefined instruction function 532 533#if __LINUX_ARM_ARCH__ < 7 534/* If the target arch was overridden, change it back: */ 535#ifdef CONFIG_CPU_32v6K --- 177 unchanged lines hidden (view full) --- 713ENDPROC(no_fp) 714 715__und_usr_fault_32: 716 mov r1, #4 717 b 1f 718__und_usr_fault_16: 719 mov r1, #2 7201: mov r0, sp | 526 @ r0 = the two 16-bit Thumb instructions which caused the exception 527 @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc) 528 @ r4 = PC value for the first 16-bit Thumb instruction 529 @ lr = 32bit undefined instruction function 530 531#if __LINUX_ARM_ARCH__ < 7 532/* If the target arch was overridden, change it back: */ 533#ifdef CONFIG_CPU_32v6K --- 177 unchanged lines hidden (view full) --- 711ENDPROC(no_fp) 712 713__und_usr_fault_32: 714 mov r1, #4 715 b 1f 716__und_usr_fault_16: 717 mov r1, #2 7181: mov r0, sp |
| 721 badr lr, ret_from_exception | 719 adr lr, BSYM(ret_from_exception) |
| 722 b __und_fault 723ENDPROC(__und_usr_fault_32) 724ENDPROC(__und_usr_fault_16) 725 726 .align 5 727__pabt_usr: 728 usr_entry 729 mov r2, sp @ regs --- 511 unchanged lines hidden --- | 720 b __und_fault 721ENDPROC(__und_usr_fault_32) 722ENDPROC(__und_usr_fault_16) 723 724 .align 5 725__pabt_usr: 726 usr_entry 727 mov r2, sp @ regs --- 511 unchanged lines hidden --- |