entry-armv.S (69dbdd819599e2f3b77c172e83af512845bca5ad) entry-armv.S (247055aa21ffef1c49dd64710d5e94c2aee19b58)
1/*
2 * linux/arch/arm/kernel/entry-armv.S
3 *
4 * Copyright (C) 1996,1997,1998 Russell King.
5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
7 *
8 * This program is free software; you can redistribute it and/or modify

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730 UNWIND(.fnstart )
731 UNWIND(.cantunwind )
732 add ip, r1, #TI_CPU_SAVE
733 ldr r3, [r2, #TI_TP_VALUE]
734 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack
735 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack
736 THUMB( str sp, [ip], #4 )
737 THUMB( str lr, [ip], #4 )
1/*
2 * linux/arch/arm/kernel/entry-armv.S
3 *
4 * Copyright (C) 1996,1997,1998 Russell King.
5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
7 *
8 * This program is free software; you can redistribute it and/or modify

--- 721 unchanged lines hidden (view full) ---

730 UNWIND(.fnstart )
731 UNWIND(.cantunwind )
732 add ip, r1, #TI_CPU_SAVE
733 ldr r3, [r2, #TI_TP_VALUE]
734 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack
735 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack
736 THUMB( str sp, [ip], #4 )
737 THUMB( str lr, [ip], #4 )
738#ifdef CONFIG_MMU
738#ifdef CONFIG_CPU_USE_DOMAINS
739 ldr r6, [r2, #TI_CPU_DOMAIN]
740#endif
741 set_tls r3, r4, r5
742#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
743 ldr r7, [r2, #TI_TASK]
744 ldr r8, =__stack_chk_guard
745 ldr r7, [r7, #TSK_STACK_CANARY]
746#endif
739 ldr r6, [r2, #TI_CPU_DOMAIN]
740#endif
741 set_tls r3, r4, r5
742#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
743 ldr r7, [r2, #TI_TASK]
744 ldr r8, =__stack_chk_guard
745 ldr r7, [r7, #TSK_STACK_CANARY]
746#endif
747#ifdef CONFIG_MMU
747#ifdef CONFIG_CPU_USE_DOMAINS
748 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
749#endif
750 mov r5, r0
751 add r4, r2, #TI_CPU_SAVE
752 ldr r0, =thread_notify_head
753 mov r1, #THREAD_NOTIFY_SWITCH
754 bl atomic_notifier_call_chain
755#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)

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748 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
749#endif
750 mov r5, r0
751 add r4, r2, #TI_CPU_SAVE
752 ldr r0, =thread_notify_head
753 mov r1, #THREAD_NOTIFY_SWITCH
754 bl atomic_notifier_call_chain
755#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)

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