entry-armv.S (4e918ab13eaf40f19938659cb5a22c93172778a8) entry-armv.S (7b9896c352073156a325c3bb0dc4c46e06e2a468)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/kernel/entry-armv.S
4 *
5 * Copyright (C) 1996,1997,1998 Russell King.
6 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
7 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
8 *

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30#include <asm/probes.h>
31
32/*
33 * Interrupt handling.
34 */
35 .macro irq_handler, from_user:req
36 mov r0, sp
37#ifdef CONFIG_IRQSTACKS
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/kernel/entry-armv.S
4 *
5 * Copyright (C) 1996,1997,1998 Russell King.
6 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
7 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
8 *

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30#include <asm/probes.h>
31
32/*
33 * Interrupt handling.
34 */
35 .macro irq_handler, from_user:req
36 mov r0, sp
37#ifdef CONFIG_IRQSTACKS
38 mov_l r2, irq_stack_ptr @ Take base address
39 mrc p15, 0, r3, c13, c0, 4 @ Get CPU offset
40#ifdef CONFIG_UNWINDER_ARM
41 mov fpreg, sp @ Preserve original SP
42#else
43 mov r8, fp @ Preserve original FP
44 mov r9, sp @ Preserve original SP
45#endif
38#ifdef CONFIG_UNWINDER_ARM
39 mov fpreg, sp @ Preserve original SP
40#else
41 mov r8, fp @ Preserve original FP
42 mov r9, sp @ Preserve original SP
43#endif
46 ldr sp, [r2, r3] @ Load SP from per-CPU var
44 ldr_this_cpu sp, irq_stack_ptr, r2, r3
45
47 .if \from_user == 0
48UNWIND( .setfp fpreg, sp )
49 @
50 @ If we took the interrupt while running in the kernel, we may already
51 @ be using the IRQ stack, so revert to the original value in that case.
52 @
53 subs r2, sp, r0 @ SP above bottom of IRQ stack?
54 rsbscs r2, r2, #THREAD_SIZE @ ... and below the top?

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871 @ relocations. As these are ARM only, switch to ARM mode first.
872 @
873 @ We enter here with IP clobbered and its value stashed on the mode
874 @ stack.
875 @
876THUMB( bx pc )
877THUMB( nop )
878THUMB( .arm )
46 .if \from_user == 0
47UNWIND( .setfp fpreg, sp )
48 @
49 @ If we took the interrupt while running in the kernel, we may already
50 @ be using the IRQ stack, so revert to the original value in that case.
51 @
52 subs r2, sp, r0 @ SP above bottom of IRQ stack?
53 rsbscs r2, r2, #THREAD_SIZE @ ... and below the top?

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870 @ relocations. As these are ARM only, switch to ARM mode first.
871 @
872 @ We enter here with IP clobbered and its value stashed on the mode
873 @ stack.
874 @
875THUMB( bx pc )
876THUMB( nop )
877THUMB( .arm )
879 mrc p15, 0, ip, c13, c0, 4 @ Get per-CPU offset
878 ldr_this_cpu_armv6 ip, overflow_stack_ptr
880
879
881 .globl overflow_stack_ptr
882 .reloc 0f, R_ARM_ALU_PC_G0_NC, overflow_stack_ptr
883 .reloc 1f, R_ARM_ALU_PC_G1_NC, overflow_stack_ptr
884 .reloc 2f, R_ARM_LDR_PC_G2, overflow_stack_ptr
885 add ip, ip, pc
8860: add ip, ip, #-4
8871: add ip, ip, #0
8882: ldr ip, [ip, #4]
889
890 str sp, [ip, #-4]! @ Preserve original SP value
891 mov sp, ip @ Switch to overflow stack
892 pop {ip} @ Original SP in IP
893
894#if defined(CONFIG_UNWINDER_FRAME_POINTER) && defined(CONFIG_CC_IS_GCC)
895 mov ip, ip @ mov expected by unwinder
896 push {fp, ip, lr, pc} @ GCC flavor frame record
897#else

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880 str sp, [ip, #-4]! @ Preserve original SP value
881 mov sp, ip @ Switch to overflow stack
882 pop {ip} @ Original SP in IP
883
884#if defined(CONFIG_UNWINDER_FRAME_POINTER) && defined(CONFIG_CC_IS_GCC)
885 mov ip, ip @ mov expected by unwinder
886 push {fp, ip, lr, pc} @ GCC flavor frame record
887#else

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