entry-armv.S (3f60db4bde17088feed5f143582d7661cdbb9a01) entry-armv.S (243c86542aeeb41d9ab78d3aa44fa6b4854fdb67)
1/*
2 * linux/arch/arm/kernel/entry-armv.S
3 *
4 * Copyright (C) 1996,1997,1998 Russell King.
5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
7 *
8 * This program is free software; you can redistribute it and/or modify

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14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction
15 * that causes it to save wrong values... Be aware!
16 */
17
18#include <asm/memory.h>
19#include <asm/glue-df.h>
20#include <asm/glue-pf.h>
21#include <asm/vfpmacros.h>
1/*
2 * linux/arch/arm/kernel/entry-armv.S
3 *
4 * Copyright (C) 1996,1997,1998 Russell King.
5 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
6 * nommu support by Hyok S. Choi (hyok.choi@samsung.com)
7 *
8 * This program is free software; you can redistribute it and/or modify

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14 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction
15 * that causes it to save wrong values... Be aware!
16 */
17
18#include <asm/memory.h>
19#include <asm/glue-df.h>
20#include <asm/glue-pf.h>
21#include <asm/vfpmacros.h>
22#ifndef CONFIG_MULTI_IRQ_HANDLER
22#include <mach/entry-macro.S>
23#include <mach/entry-macro.S>
24#endif
23#include <asm/thread_notify.h>
24#include <asm/unwind.h>
25#include <asm/unistd.h>
26#include <asm/tls.h>
27#include <asm/system.h>
28
29#include "entry-header.S"
30#include <asm/entry-macro-multi.S>

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1096 * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC
1097 * MUST PRESERVE SVC SPSR, but need to switch to SVC mode to show our msg.
1098 * Basically to switch modes, we *HAVE* to clobber one register... brain
1099 * damage alert! I don't think that we can execute any code in here in any
1100 * other mode than FIQ... Ok you can switch to another mode, but you can't
1101 * get out of that mode without clobbering one register.
1102 */
1103vector_fiq:
25#include <asm/thread_notify.h>
26#include <asm/unwind.h>
27#include <asm/unistd.h>
28#include <asm/tls.h>
29#include <asm/system.h>
30
31#include "entry-header.S"
32#include <asm/entry-macro-multi.S>

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1098 * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC
1099 * MUST PRESERVE SVC SPSR, but need to switch to SVC mode to show our msg.
1100 * Basically to switch modes, we *HAVE* to clobber one register... brain
1101 * damage alert! I don't think that we can execute any code in here in any
1102 * other mode than FIQ... Ok you can switch to another mode, but you can't
1103 * get out of that mode without clobbering one register.
1104 */
1105vector_fiq:
1104 disable_fiq
1105 subs pc, lr, #4
1106
1107/*=============================================================================
1108 * Address exception handler
1109 *-----------------------------------------------------------------------------
1110 * These aren't too critical.
1111 * (they're not supposed to happen, and won't happen in 32-bit data mode).
1112 */

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1106 subs pc, lr, #4
1107
1108/*=============================================================================
1109 * Address exception handler
1110 *-----------------------------------------------------------------------------
1111 * These aren't too critical.
1112 * (they're not supposed to happen, and won't happen in 32-bit data mode).
1113 */

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