| assembler.h (952f03316352c606bebef56ba8f9642edbb8e348) | assembler.h (508074607c7b95b24f0adf633fdf606761bb7824) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * arch/arm/include/asm/assembler.h 4 * 5 * Copyright (C) 1996-2000 Russell King 6 * 7 * This file contains arm architecture specific defines 8 * for the different processors. --- 652 unchanged lines hidden (view full) --- 661 * @sym: name of the symbol 662 * @tmp: mandatory scratch register 663 * @cond: conditional opcode suffix 664 */ 665 .macro str_l, src:req, sym:req, tmp:req, cond 666 __adldst_l str, \src, \sym, \tmp, \cond 667 .endm 668 | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * arch/arm/include/asm/assembler.h 4 * 5 * Copyright (C) 1996-2000 Russell King 6 * 7 * This file contains arm architecture specific defines 8 * for the different processors. --- 652 unchanged lines hidden (view full) --- 661 * @sym: name of the symbol 662 * @tmp: mandatory scratch register 663 * @cond: conditional opcode suffix 664 */ 665 .macro str_l, src:req, sym:req, tmp:req, cond 666 __adldst_l str, \src, \sym, \tmp, \cond 667 .endm 668 |
| 669 .macro __ldst_va, op, reg, tmp, sym, cond | 669 .macro __ldst_va, op, reg, tmp, sym, cond, offset |
| 670#if __LINUX_ARM_ARCH__ >= 7 || \ 671 !defined(CONFIG_ARM_HAS_GROUP_RELOCS) || \ 672 (defined(MODULE) && defined(CONFIG_ARM_MODULE_PLTS)) 673 mov_l \tmp, \sym, \cond | 670#if __LINUX_ARM_ARCH__ >= 7 || \ 671 !defined(CONFIG_ARM_HAS_GROUP_RELOCS) || \ 672 (defined(MODULE) && defined(CONFIG_ARM_MODULE_PLTS)) 673 mov_l \tmp, \sym, \cond |
| 674 \op\cond \reg, [\tmp] | |
| 675#else 676 /* 677 * Avoid a literal load, by emitting a sequence of ADD/LDR instructions 678 * with the appropriate relocations. The combined sequence has a range 679 * of -/+ 256 MiB, which should be sufficient for the core kernel and 680 * for modules loaded into the module region. 681 */ 682 .globl \sym 683 .reloc .L0_\@, R_ARM_ALU_PC_G0_NC, \sym 684 .reloc .L1_\@, R_ARM_ALU_PC_G1_NC, \sym 685 .reloc .L2_\@, R_ARM_LDR_PC_G2, \sym | 674#else 675 /* 676 * Avoid a literal load, by emitting a sequence of ADD/LDR instructions 677 * with the appropriate relocations. The combined sequence has a range 678 * of -/+ 256 MiB, which should be sufficient for the core kernel and 679 * for modules loaded into the module region. 680 */ 681 .globl \sym 682 .reloc .L0_\@, R_ARM_ALU_PC_G0_NC, \sym 683 .reloc .L1_\@, R_ARM_ALU_PC_G1_NC, \sym 684 .reloc .L2_\@, R_ARM_LDR_PC_G2, \sym |
| 686.L0_\@: sub\cond \tmp, pc, #8 687.L1_\@: sub\cond \tmp, \tmp, #4 688.L2_\@: \op\cond \reg, [\tmp, #0] | 685.L0_\@: sub\cond \tmp, pc, #8 - \offset 686.L1_\@: sub\cond \tmp, \tmp, #4 - \offset 687.L2_\@: |
| 689#endif | 688#endif |
| 689 \op\cond \reg, [\tmp, #\offset] |
|
| 690 .endm 691 692 /* 693 * ldr_va - load a 32-bit word from the virtual address of \sym 694 */ | 690 .endm 691 692 /* 693 * ldr_va - load a 32-bit word from the virtual address of \sym 694 */ |
| 695 .macro ldr_va, rd:req, sym:req, cond, tmp | 695 .macro ldr_va, rd:req, sym:req, cond, tmp, offset=0 |
| 696 .ifnb \tmp | 696 .ifnb \tmp |
| 697 __ldst_va ldr, \rd, \tmp, \sym, \cond | 697 __ldst_va ldr, \rd, \tmp, \sym, \cond, \offset |
| 698 .else | 698 .else |
| 699 __ldst_va ldr, \rd, \rd, \sym, \cond | 699 __ldst_va ldr, \rd, \rd, \sym, \cond, \offset |
| 700 .endif 701 .endm 702 703 /* 704 * str_va - store a 32-bit word to the virtual address of \sym 705 */ 706 .macro str_va, rn:req, sym:req, tmp:req, cond | 700 .endif 701 .endm 702 703 /* 704 * str_va - store a 32-bit word to the virtual address of \sym 705 */ 706 .macro str_va, rn:req, sym:req, tmp:req, cond |
| 707 __ldst_va str, \rn, \tmp, \sym, \cond | 707 __ldst_va str, \rn, \tmp, \sym, \cond, 0 |
| 708 .endm 709 710 /* 711 * ldr_this_cpu_armv6 - Load a 32-bit word from the per-CPU variable 'sym', 712 * without using a temp register. Supported in ARM mode 713 * only. 714 */ 715 .macro ldr_this_cpu_armv6, rd:req, sym:req --- 64 unchanged lines hidden --- | 708 .endm 709 710 /* 711 * ldr_this_cpu_armv6 - Load a 32-bit word from the per-CPU variable 'sym', 712 * without using a temp register. Supported in ARM mode 713 * only. 714 */ 715 .macro ldr_this_cpu_armv6, rd:req, sym:req --- 64 unchanged lines hidden --- |