troubleshoot.c (5f09bc8cc4010a3ea17c5881a62fc45192ebe7b0) troubleshoot.c (76551468833cd5c356b1d9ff4bc9393fcf768a59)
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 */
7
8#include <linux/ptrace.h>

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140 pr_cont("Insn could not be fetched\n");
141 } else if (vec == ECR_V_MACH_CHK) {
142 pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ?
143 "Double Fault" : "Other Fatal Err");
144
145 } else if (vec == ECR_V_PROTV) {
146 if (cause_code == ECR_C_PROTV_INST_FETCH)
147 pr_cont("Execute from Non-exec Page\n");
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 */
7
8#include <linux/ptrace.h>

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140 pr_cont("Insn could not be fetched\n");
141 } else if (vec == ECR_V_MACH_CHK) {
142 pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ?
143 "Double Fault" : "Other Fatal Err");
144
145 } else if (vec == ECR_V_PROTV) {
146 if (cause_code == ECR_C_PROTV_INST_FETCH)
147 pr_cont("Execute from Non-exec Page\n");
148 else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
148 else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
149 IS_ENABLED(CONFIG_ISA_ARCOMPACT))
149 pr_cont("Misaligned r/w from 0x%08lx\n", address);
150 else
151 pr_cont("%s access not allowed on page\n",
152 (cause_code == 0x01) ? "Read" :
153 ((cause_code == 0x02) ? "Write" : "EX"));
154 } else if (vec == ECR_V_INSN_ERR) {
155 pr_cont("Illegal Insn\n");
156#ifdef CONFIG_ISA_ARCV2
157 } else if (vec == ECR_V_MEM_ERR) {
158 if (cause_code == 0x00)
159 pr_cont("Bus Error from Insn Mem\n");
160 else if (cause_code == 0x10)
161 pr_cont("Bus Error from Data Mem\n");
162 else
163 pr_cont("Bus Error, check PRM\n");
150 pr_cont("Misaligned r/w from 0x%08lx\n", address);
151 else
152 pr_cont("%s access not allowed on page\n",
153 (cause_code == 0x01) ? "Read" :
154 ((cause_code == 0x02) ? "Write" : "EX"));
155 } else if (vec == ECR_V_INSN_ERR) {
156 pr_cont("Illegal Insn\n");
157#ifdef CONFIG_ISA_ARCV2
158 } else if (vec == ECR_V_MEM_ERR) {
159 if (cause_code == 0x00)
160 pr_cont("Bus Error from Insn Mem\n");
161 else if (cause_code == 0x10)
162 pr_cont("Bus Error from Data Mem\n");
163 else
164 pr_cont("Bus Error, check PRM\n");
165 } else if (vec == ECR_V_MISALIGN) {
166 pr_cont("Misaligned r/w from 0x%08lx\n", address);
164#endif
165 } else if (vec == ECR_V_TRAP) {
166 if (regs->ecr_param == 5)
167 pr_cont("gcc generated __builtin_trap\n");
168 } else {
169 pr_cont("Check Programmer's Manual\n");
170 }
171}

--- 77 unchanged lines hidden --- 		167#endif
168 } else if (vec == ECR_V_TRAP) {
169 if (regs->ecr_param == 5)
170 pr_cont("gcc generated __builtin_trap\n");
171 } else {
172 pr_cont("Check Programmer's Manual\n");
173 }
174}

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