head.S (70f3522614e60b6125eff5f9dd7c887543812187) head.S (76551468833cd5c356b1d9ff4bc9393fcf768a59)
1/*
2 * ARC CPU startup Code
3 *
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 40 unchanged lines hidden (view full) ---

49
501:
51
52#ifdef CONFIG_ISA_ARCV2
53 ; Unaligned access is disabled at reset, so re-enable early as
54 ; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
55 ; by default
56 lr r5, [status32]
1/*
2 * ARC CPU startup Code
3 *
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 40 unchanged lines hidden (view full) ---

49
501:
51
52#ifdef CONFIG_ISA_ARCV2
53 ; Unaligned access is disabled at reset, so re-enable early as
54 ; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
55 ; by default
56 lr r5, [status32]
57#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
57 bset r5, r5, STATUS_AD_BIT
58 bset r5, r5, STATUS_AD_BIT
59#else
60 ; Although disabled at reset, bootloader might have enabled it
61 bclr r5, r5, STATUS_AD_BIT
62#endif
58 kflag r5
59#endif
60.endm
61
62 .section .init.text, "ax",@progbits
63
64;----------------------------------------------------------------
65; Default Reset Handler (jumped into from Reset vector)

--- 78 unchanged lines hidden --- 		63 kflag r5
64#endif
65.endm
66
67 .section .init.text, "ax",@progbits
68
69;----------------------------------------------------------------
70; Default Reset Handler (jumped into from Reset vector)

--- 78 unchanged lines hidden ---