pxa2xx.rst (a9c8f68ce2c37ced2f7a8667eda71b7753ede398) | pxa2xx.rst (8393961c53b31078cfc877bc00eb0f67e1474edd) |
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1============================== 2PXA2xx SPI on SSP driver HOWTO 3============================== 4 5This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx 6synchronous serial port into an SPI master controller 7(see Documentation/spi/spi-summary.rst). The driver has the following features 8 --- 87 unchanged lines hidden (view full) --- 96 97:: 98 99 struct pxa2xx_spi_chip { 100 u8 tx_threshold; 101 u8 rx_threshold; 102 u8 dma_burst_size; 103 u32 timeout; | 1============================== 2PXA2xx SPI on SSP driver HOWTO 3============================== 4 5This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx 6synchronous serial port into an SPI master controller 7(see Documentation/spi/spi-summary.rst). The driver has the following features 8 --- 87 unchanged lines hidden (view full) --- 96 97:: 98 99 struct pxa2xx_spi_chip { 100 u8 tx_threshold; 101 u8 rx_threshold; 102 u8 dma_burst_size; 103 u32 timeout; |
104 u8 enable_loopback; | |
105 int gpio_cs; 106 }; 107 108The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are 109used to configure the SSP hardware FIFO. These fields are critical to the 110performance of pxa2xx_spi driver and misconfiguration will result in rx 111FIFO overruns (especially in PIO mode transfers). Good default values are:: 112 --- 10 unchanged lines hidden (view full) --- 123dma_burst_size == 0. 124 125The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle 126trailing bytes in the SSP receiver FIFO. The correct value for this field is 127dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific 128slave device. Please note that the PXA2xx SSP 1 does not support trailing byte 129timeouts and must busy-wait any trailing bytes. 130 | 104 int gpio_cs; 105 }; 106 107The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are 108used to configure the SSP hardware FIFO. These fields are critical to the 109performance of pxa2xx_spi driver and misconfiguration will result in rx 110FIFO overruns (especially in PIO mode transfers). Good default values are:: 111 --- 10 unchanged lines hidden (view full) --- 122dma_burst_size == 0. 123 124The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle 125trailing bytes in the SSP receiver FIFO. The correct value for this field is 126dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific 127slave device. Please note that the PXA2xx SSP 1 does not support trailing byte 128timeouts and must busy-wait any trailing bytes. 129 |
131The "pxa2xx_spi_chip.enable_loopback" field is used to place the SSP porting 132into internal loopback mode. In this mode the SSP controller internally 133connects the SSPTX pin to the SSPRX pin. This is useful for initial setup 134testing. 135 | |
136NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the 137chipselect is dropped after each spi_transfer. Most devices need chip select 138asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor) 139to accommodate these chips. 140 141 142NSSP SLAVE SAMPLE 143----------------- --- 80 unchanged lines hidden --- | 130NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the 131chipselect is dropped after each spi_transfer. Most devices need chip select 132asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor) 133to accommodate these chips. 134 135 136NSSP SLAVE SAMPLE 137----------------- --- 80 unchanged lines hidden --- |