Searched refs:timreg (Results 1 – 1 of 1) sorted by relevance
148 u8 timreg; in ftide010_set_dmamode() local172 timreg = udma_66_setup_time[i] << 4 | in ftide010_set_dmamode()175 timreg = udma_50_setup_time[i] << 4 | in ftide010_set_dmamode()181 timreg |= FTIDE010_UDMA_TIMING_MODE_56; in ftide010_set_dmamode()184 clkreg, timreg); in ftide010_set_dmamode()187 writeb(timreg, ftide->base + FTIDE010_UDMA_TIMING0 + devno); in ftide010_set_dmamode()195 timreg = mwdma_66_active_time[i] << 4 | in ftide010_set_dmamode()198 timreg = mwdma_50_active_time[i] << 4 | in ftide010_set_dmamode()203 clkreg, timreg); in ftide010_set_dmamode()206 writeb(timreg, ftide->base + FTIDE010_MWDMA_TIMING); in ftide010_set_dmamode()