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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_sr.S25 .macro test_sr_op sym, mask, op, op_byte, sr macro
47 test_sr_op \sym, \mask & 1, rsr, HI_RSR, \sr
48 test_sr_op \sym, \mask & 2, wsr, HI_WSR, \sr
49 test_sr_op \sym, \mask & 4, xsr, HI_XSR, \sr