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Searched refs:spmbase (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dmachine.c171 VMSTATE_UINTTL(env.spmbase, RISCVCPU),
H A Dcpu.h461 target_ulong spmbase; member
H A Dcpu_helper.c245 base = env->spmbase; in riscv_cpu_update_mask()
H A Dcsr.c4591 *val = env->spmbase; in read_spmbase()
4604 env->spmbase = val; in write_spmbase()