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Searched refs:riscv_iommu_reg_get64 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu.h125 static inline uint64_t riscv_iommu_reg_get64(RISCVIOMMUState *s, in riscv_iommu_reg_get64() function
H A Driscv-iommu.c1502 uint64_t new_ddtp = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_DDTP); in riscv_iommu_process_ddtp()
1702 base = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_CQB); in riscv_iommu_process_cq_control()
1733 base = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_FQB); in riscv_iommu_process_fq_control()
1763 base = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_PQB); in riscv_iommu_process_pq_control()
1786 uint64_t iova = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_TR_REQ_IOVA); in riscv_iommu_process_dbg()
1787 uint64_t ctrl = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_TR_REQ_CTL); in riscv_iommu_process_dbg()