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Searched refs:regs_rw (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu.h78 uint8_t *regs_rw; /* register state (user write) */ member
95 uint32_t val = ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod32()
96 stl_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod32()
103 stl_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set32()
108 return ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_get32()
114 uint64_t val = ldq_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod64()
115 stq_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod64()
122 stq_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set64()
128 return ldq_le_p(s->regs_rw + idx); in riscv_iommu_reg_get64()
H A Driscv-iommu.c1706 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_CQH], 0); in riscv_iommu_process_cq_control()
1707 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_CQT], 0); in riscv_iommu_process_cq_control()
1737 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_FQH], 0); in riscv_iommu_process_fq_control()
1738 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_FQT], 0); in riscv_iommu_process_fq_control()
1767 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_PQH], 0); in riscv_iommu_process_pq_control()
1768 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_PQT], 0); in riscv_iommu_process_pq_control()
2012 uint32_t rw = ldl_le_p(&s->regs_rw[regb]); in riscv_iommu_mmio_write()
2013 stl_le_p(&s->regs_rw[regb], rw | busy); in riscv_iommu_mmio_write()
2039 ptr = &s->regs_rw[addr]; in riscv_iommu_mmio_read()
2151 s->regs_rw = g_new0(uint8_t, RISCV_IOMMU_REG_SIZE); in riscv_iommu_realize()
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