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Searched refs:reg_val1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/net/phy/
H A Daquantia.c260 u32 reg_val1 = 0; in aquantia_config() local
333 reg_val1 = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_FIRMWARE_ID); in aquantia_config()
337 (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8, in aquantia_config()
338 reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK, in aquantia_config()
/openbmc/linux/drivers/media/dvb-frontends/
H A Dmxl692.c716 u32 reg_val, reg_val1; in mxl692_config_xtal() local
750 status = mxl692_memread(dev, 0x90000030, (u8 *)&reg_val1, sizeof(u32)); in mxl692_config_xtal()
756 reg_val1 &= 0xFFFFFFFD; in mxl692_config_xtal()
757 reg_val1 |= 0x30; in mxl692_config_xtal()
759 status = mxl692_memwrite(dev, 0x90000030, (u8 *)&reg_val1, sizeof(u32)); in mxl692_config_xtal()
764 reg_val1 |= 0x2; in mxl692_config_xtal()
766 status = mxl692_memwrite(dev, 0x90000030, (u8 *)&reg_val1, sizeof(u32)); in mxl692_config_xtal()
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1976 int ddr3_tip_adll_regs_bypass(u32 dev_num, u32 reg_val1, u32 reg_val2) in ddr3_tip_adll_regs_bypass() argument
1989 CTX_PHY_REG(effective_cs), reg_val1)); in ddr3_tip_adll_regs_bypass()
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_common.c4380 u32 reg_addr1, u32 *reg_val1) in i40e_aq_alternate_read() argument
4399 if (reg_val1) in i40e_aq_alternate_read()
4400 *reg_val1 = le32_to_cpu(cmd_resp->data1); in i40e_aq_alternate_read()