Home
last modified time | relevance | path

Searched refs:regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9268 #define regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h8323 #define regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8397 #define regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h8398 #define regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9492 #define regOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro