Home
last modified time | relevance | path

Searched refs:regOTG1_OTG_CLOCK_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9122 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8881 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h8177 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8251 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h8252 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9346 #define regOTG1_OTG_CLOCK_CONTROL_BASE_IDX … macro