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Searched refs:regMPCC_MCM0_MPCC_MCM_MEM_PWR_CTRL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_1_offset.h5956 #define regMPCC_MCM0_MPCC_MCM_MEM_PWR_CTRL … macro
H A Ddcn_3_2_0_offset.h5957 #define regMPCC_MCM0_MPCC_MCM_MEM_PWR_CTRL … macro