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Searched refs:regCP_MEC_CNTL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1385 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MEC_CNTL, 0); in gfx_v9_4_3_xcc_cp_compute_enable()
1387 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MEC_CNTL, in gfx_v9_4_3_xcc_cp_compute_enable()
H A Dgfx_v11_0.c3366 data = RREG32_SOC15(GC, 0, regCP_MEC_CNTL); in gfx_v11_0_cp_compute_enable()
3377 WREG32_SOC15(GC, 0, regCP_MEC_CNTL, data); in gfx_v11_0_cp_compute_enable()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h185 #define regCP_MEC_CNTL … macro
H A Dgc_9_4_3_offset.h142 #define regCP_MEC_CNTL … macro
H A Dgc_11_0_0_offset.h6196 #define regCP_MEC_CNTL … macro
H A Dgc_11_0_3_offset.h6476 #define regCP_MEC_CNTL … macro