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/openbmc/u-boot/arch/x86/cpu/quark/
H A Dmrc_util.h85 void set_rcvn(uint8_t channel, uint8_t rank,
88 void set_rdqs(uint8_t channel, uint8_t rank,
91 void set_wdqs(uint8_t channel, uint8_t rank,
94 void set_wdq(uint8_t channel, uint8_t rank,
99 void set_wclk(uint8_t channel, uint8_t rank, uint32_t pi_count);
100 uint32_t get_wclk(uint8_t channel, uint8_t rank);
101 void set_wctl(uint8_t channel, uint8_t rank, uint32_t pi_count);
102 uint32_t get_wctl(uint8_t channel, uint8_t rank);
106 uint32_t get_addr(uint8_t channel, uint8_t rank);
108 uint8_t rank, bool rcvn);
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H A Dmrc_util.c789 temp >>= rank ? 12 : 8; in get_wclk()
803 temp >>= rank ? 16 : 8; in get_wclk()
1004 if (rank > 1) { in get_addr()
1124 channel, rank, rcvn); in find_rising_edge()
1212 set_rcvn(channel, rank, in find_rising_edge()
1215 set_wdqs(channel, rank, in find_rising_edge()
1229 set_rcvn(channel, rank, in find_rising_edge()
1447 uint8_t rank; in print_timings() local
1457 for (rank = 0; rank < NUM_RANKS; rank++) { in print_timings()
1459 (1 << rank)) { in print_timings()
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/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dcmd_ddrphy.c142 int rank; in __wld_dump() local
146 for (rank = 0; rank < 4; rank++) { in __wld_dump()
147 u32 wld = (lcdlr0 >> (8 * rank)) & 0xff; /* Delay */ in __wld_dump()
148 u32 wlsl = (gtr >> (12 + 2 * rank)) & 0x3; /* System Latency */ in __wld_dump()
165 int rank; in __dqsgd_dump() local
169 for (rank = 0; rank < 4; rank++) { in __dqsgd_dump()
170 u32 dqsgd = (lcdlr2 >> (8 * rank)) & 0xff; /* Delay */ in __dqsgd_dump()
171 u32 dgsl = (gtr >> (3 * rank)) & 0x7; /* System Latency */ in __dqsgd_dump()
H A Dcmd_ddrmphy.c168 int rank; in __wld_dump() local
172 for (rank = 0; rank < 4; rank++) { in __wld_dump()
173 u32 wld = (lcdlr0 >> (8 * rank)) & 0xff; /* Delay */ in __wld_dump()
174 u32 wlsl = (gtr >> (12 + 2 * rank)) & 0x3; /* System Latency */ in __wld_dump()
191 int rank; in __dqsgd_dump() local
195 for (rank = 0; rank < 4; rank++) { in __dqsgd_dump()
196 u32 dqsgd = (lcdlr2 >> (8 * rank)) & 0xff; /* Delay */ in __dqsgd_dump()
197 u32 dgsl = (gtr >> (3 * rank)) & 0x7; /* System Latency */ in __dqsgd_dump()
H A Dddrphy-training.c21 void ddrphy_prepare_training(void __iomem *phy_base, int rank) in ddrphy_prepare_training() argument
31 tmp |= (1 << (PHY_DX_GCR_WLRKEN_SHIFT + rank)) & in ddrphy_prepare_training()
40 tmp |= (rank << PHY_DTCR_DTRANK_SHIFT) & PHY_DTCR_DTRANK_MASK; in ddrphy_prepare_training()
45 tmp |= (1 << (PHY_DTCR_RANKEN_SHIFT + rank)) & PHY_DTCR_RANKEN_MASK; in ddrphy_prepare_training()
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml7 title: LPDDR channel with chip/rank topology description
34 channel is equal to the sum of the densities of each rank on the
51 "^rank@[0-9]+$":
56 transaction on the channel targets exactly one rank, based on the
70 "^rank@[0-9]+$":
79 "^rank@[0-9]+$":
88 "^rank@[0-9]+$":
97 "^rank@[0-9]+$":
116 rank@0 {
131 rank@0 {
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/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a33.c26 u8 rank; member
42 MCTL_CR_BANK(para->bank) | MCTL_CR_RANK(para->rank), in mctl_set_cr()
48 u8 orig_rank = para->rank; in auto_detect_dram_size()
55 para->rank = 1; in auto_detect_dram_size()
72 para->rank = orig_rank; in auto_detect_dram_size()
184 if (para->rank == 2) in mctl_data_train_cfg()
232 para->rank = 2; in mctl_channel_init()
259 para->rank = 1; in mctl_channel_init()
337 .rank = 2, in sunxi_dram_init()
354 if (para.rank == 2) in sunxi_dram_init()
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H A Ddram_sun8i_a83t.c24 u8 rank; member
47 u8 orig_rank = para->rank; in auto_detect_dram_size()
54 para->rank = 1; in auto_detect_dram_size()
71 para->rank = orig_rank; in auto_detect_dram_size()
216 if (para->rank == 2) in mctl_data_train_cfg()
315 para->rank = 2; in mctl_channel_init()
351 para->rank = 1; in mctl_channel_init()
415 para->rank = 2; in mctl_sys_init()
435 .rank = 1, in sunxi_dram_init()
464 if (para.rank == 2) in sunxi_dram_init()
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H A Ddram_sun6i.c24 u8 rank; member
91 static bool mctl_rank_detect(u32 *gsr0, int rank) in mctl_rank_detect() argument
93 const u32 done = MCTL_DX_GSR0_RANK0_TRAIN_DONE << rank; in mctl_rank_detect()
94 const u32 err = MCTL_DX_GSR0_RANK0_TRAIN_ERR << rank; in mctl_rank_detect()
166 para->rank = 1; in mctl_channel_init()
274 MCTL_CR_BANK(1) | MCTL_CR_RANK(para->rank), &mctl_com->cr); in mctl_com_init()
339 .rank = 2, in sunxi_dram_init()
407 MCTL_CR_RANK(para.rank)); in sunxi_dram_init()
409 return 1 << (para.rank + para.rows + bank + columns + para.chan + bus); in sunxi_dram_init()
/openbmc/linux/drivers/s390/cio/
H A Dscm.c104 scm_attr(rank);
141 scmdev->attrs.rank = sale->rank; in scmdev_setup()
145 scmdev->attrs.rank = sale->rank; in scmdev_setup()
163 changed = scmdev->attrs.rank != sale->rank || in scmdev_update()
165 scmdev->attrs.rank = sale->rank; in scmdev_update()
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/
H A DPowerSupplyRedundancy.interface.yaml22 The rank order for each PSU, 0 means will not go into cold standby
28 Specific, and rotation is enabled, BMC will change PSU rank order
52 1 to the rank order in each PSU and change the last rank order
53 to the first rank order.
58 will update the rank order to PSU.
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3399.c565 u32 rank) in select_per_cs_training_index() argument
618 u32 rank = sdram_params->ch[channel].rank; in data_training_ca() local
620 for (i = 0; i < rank; i++) { in data_training_ca()
668 u32 rank = sdram_params->ch[channel].rank; in data_training_wl() local
670 for (i = 0; i < rank; i++) { in data_training_wl()
724 u32 rank = sdram_params->ch[channel].rank; in data_training_rg() local
726 for (i = 0; i < rank; i++) { in data_training_rg()
779 u32 rank = sdram_params->ch[channel].rank; in data_training_rl() local
781 for (i = 0; i < rank; i++) { in data_training_rl()
820 u32 rank = sdram_params->ch[channel].rank; in data_training_wdql() local
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H A Dsdram_rk3188.c319 u32 rank, u32 cmd, u32 ma, u32 op) in send_command_op() argument
419 u32 rank; in data_training() local
430 rank = sdram_params->ch[channel].rank | 1; in data_training()
445 != rank) in data_training()
448 != rank) in data_training()
452 & rank) != rank) in data_training()
455 & rank) != rank) in data_training()
466 send_command(pctl, rank, REF_CMD, 0); in data_training()
556 if (sdram_params->ch[0].rank == 2) in dram_all_config()
585 sdram_params->ch[channel].rank = 1; in sdram_rank_bw_detect()
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H A Dsdram_rk3288.c377 u32 rank, u32 cmd, u32 ma, u32 op) in send_command_op() argument
477 u32 rank; in data_training() local
488 rank = sdram_params->ch[channel].rank | 1; in data_training()
503 != rank) in data_training()
506 != rank) in data_training()
510 & rank) != rank) in data_training()
513 & rank) != rank) in data_training()
524 send_command(pctl, rank, REF_CMD, 0); in data_training()
638 sdram_params->ch[channel].rank = 1; in sdram_rank_bw_detect()
752 (sdram_params->ch[0].rank - 1) + in sdram_get_stride()
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/openbmc/u-boot/arch/arm/mach-rockchip/
H A Dsdram_common.c16 u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4; in rockchip_sdram_size() local
27 rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & in rockchip_sdram_size()
42 if (rank > 1) in rockchip_sdram_size()
48 rank, col, bk, cs0_row, bw, row_3_4); in rockchip_sdram_size()
/openbmc/linux/drivers/edac/
H A Di5100_edac.c357 int chan, int rank) in i5100_rank_to_slot() argument
367 if (priv->dimm_csmap[i][j] == rank) in i5100_rank_to_slot()
430 unsigned rank, in i5100_handle_ce() argument
445 chan, rank, -1, in i5100_handle_ce()
452 unsigned rank, in i5100_handle_ue() argument
467 chan, rank, -1, in i5100_handle_ue()
481 unsigned rank; in i5100_read_log() local
499 rank = i5100_recmema_rank(dw2); in i5100_read_log()
521 rank = i5100_nrecmema_rank(dw2); in i5100_read_log()
777 u8 rank; in i5100_init_dimm_layout() local
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H A Dal_mc_edac.c65 u8 rank, u32 row, u8 bg, u8 bank, u16 column, in prepare_msg() argument
71 rank, row, bg, bank, column, syn0, syn1, syn2); in prepare_msg()
81 u8 rank, bg, bank; in handle_ce() local
100 rank = FIELD_GET(AL_MC_ECC_CE_ADDR0_RANK, ecccaddr0); in handle_ce()
108 rank, row, bg, bank, column, in handle_ce()
126 u8 rank, bg, bank; in handle_ue() local
145 rank = FIELD_GET(AL_MC_ECC_UE_ADDR0_RANK, eccuaddr0); in handle_ue()
153 rank, row, bg, bank, column, in handle_ue()
H A Di3200_edac.c137 u64 rank = ((log & I3200_ECCERRLOG_RANK_BITS) >> in eccerrlog_row() local
139 return rank | (channel * I3200_RANKS_PER_CHANNEL); in eccerrlog_row()
317 int channel, int rank) in drb_to_nr_pages() argument
321 n = drbs[channel][rank]; in drb_to_nr_pages()
325 if (rank > 0) in drb_to_nr_pages()
326 n -= drbs[channel][rank - 1]; in drb_to_nr_pages()
328 drbs[channel][rank] == drbs[channel][I3200_RANKS_PER_CHANNEL - 1]) in drb_to_nr_pages()
H A Docteon_edac-lmc.c32 unsigned long rank; member
94 fadr.cn61xx.fbunk = pvt->rank; in octeon_lmc_edac_poll_o2()
160 TEMPLATE_SHOW(rank);
161 TEMPLATE_STORE(rank);
203 static DEVICE_ATTR(rank, S_IRUGO | S_IWUSR,
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-devices-edac86 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/size
92 stick. For rank*/size, this is the size, in MB for one rank
93 of the DIMM memory stick. On single rank memories (1R), this
94 is also the total size of the dimm. On dual rank (2R) memories,
97 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_dev_type
112 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_label
127 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_location
132 branch/channel/slot or channel/slot) of the dimm or rank.
134 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_mem_type
142 What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_ce_count
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/openbmc/linux/drivers/s390/block/
H A Dscm_blk.h66 u8 rank; in SCM_LOG_STATE() member
70 .rank = scmdev->attrs.rank, in SCM_LOG_STATE()
/openbmc/u-boot/arch/arm/mach-rockchip/rk3036/
H A Dsdram_rk3036.c444 u32 rank, u32 cmd, u32 arg) in send_command() argument
446 writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd); in send_command()
655 if (config.rank == 2) { in dram_cfg_rbc()
704 if (config.rank > 1) in sdram_all_config()
709 (config.rank - 1) << DDR_RANK_CNT_SHIFT | in sdram_all_config()
721 u32 size, os_reg, cs0_row, cs1_row, col, bank, rank; in sdram_size() local
730 rank = 1 + ((os_reg >> DDR_RANK_CNT_SHIFT) & DDR_RANK_CNT_MASK); in sdram_size()
735 if (rank > 1) in sdram_size()
/openbmc/intel-ipmi-oem/src/
H A Dipmi_to_redfish_hooks.cpp351 int rank = selData.eventData2 & 0x03; in biosSMIMessageHook() local
367 messageArgs.push_back(std::to_string(rank)); in biosSMIMessageHook()
398 int rank = selData.eventData2 & 0x0F; in biosSMIMessageHook() local
411 messageArgs.push_back(std::to_string(rank)); in biosSMIMessageHook()
625 int rank = selData.eventData2 & 0x03; in biosSMIMessageHook() local
641 messageArgs.push_back(std::to_string(rank)); in biosSMIMessageHook()
798 int rank = selData.eventData2 & 0x0F; in biosSMIMessageHook() local
811 messageArgs.push_back(std::to_string(rank)); in biosSMIMessageHook()
/openbmc/openbmc/poky/scripts/
H A Doe-pkgdata-browser45 rank = 0
47 rank = int((math.log10(nbytes)) / 3)
48 rank = min(rank, len(suffixes) - 1)
49 human = nbytes / (1000.0 ** rank)
51 return '%s %s' % (f, suffixes[rank])
/openbmc/linux/drivers/memory/tegra/
H A Dtegra210-emc-core.c59 #define TRIM_REG(chan, rank, reg, byte) \ argument
60 (((EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \
63 rank ## _ ## reg ## _INDEX]) >> \
64 EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \
67 (((EMC_DATA_BRLSHFT_ ## rank ## _RANK ## rank ## _BYTE ## \
70 _EMC_DATA_BRLSHFT_ ## rank ## _INDEX]) >> \
71 EMC_DATA_BRLSHFT_ ## rank ## _RANK ## rank ## _BYTE ## \
74 #define CALC_TEMP(rank, reg, byte1, byte2, n) \ argument
77 EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \
82 EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \
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