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Searched refs:pll6_cfg (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun50i_h6.c13 writel(CCM_PLL6_DEFAULT, &ccm->pll6_cfg); in clock_init_safe()
14 while (!(readl(&ccm->pll6_cfg) & CCM_PLL6_LOCK)) in clock_init_safe()
86 uint32_t rval = readl(&ccm->pll6_cfg); in clock_get_pll6()
H A Dclock_sun4i.c40 writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); in clock_init_safe()
43 setbits_le32(&ccm->pll6_cfg, 0x1 << CCM_PLL6_CTRL_SATA_EN_SHIFT); in clock_init_safe()
221 uint32_t rval = readl(&ccm->pll6_cfg); in clock_get_pll6()
H A Dclock_sun8i_a83t.c39 writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); in clock_init_safe()
128 uint32_t rval = readl(&ccm->pll6_cfg); in clock_get_pll6()
H A Dclock_sun6i.c44 writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); in clock_init_safe()
45 while (!(readl(&ccm->pll6_cfg) & CCM_PLL6_CTRL_LOCK)) in clock_init_safe()
315 uint32_t rval = readl(&ccm->pll6_cfg); in clock_get_pll6()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun8i_a83t.h27 u32 pll6_cfg; /* 0x28 pll6 peripheral control */ member
H A Dclock_sun4i.h24 u32 pll6_cfg; /* 0x28 pll6 control */ member
H A Dclock_sun50i_h6.h17 u32 pll6_cfg; /* 0x020 pll6 (periph0) control */ member
H A Dclock_sun6i.h24 u32 pll6_cfg; /* 0x28 pll6 control */ member