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Searched refs:pbs_curr_val (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c1151 u32 pbs_curr_val; in ddr3_pbs_per_bit() local
1184 pbs_curr_val = start_pbs; in ddr3_pbs_per_bit()
1196 pbs_curr_val++; in ddr3_pbs_per_bit()
1198 pbs_curr_val--; in ddr3_pbs_per_bit()
1222 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
1226 CS0, idx, 0, pbs_curr_val); in ddr3_pbs_per_bit()
1242 pbs_curr_val, start_pbs, in ddr3_pbs_per_bit()
1293 if (pbs_curr_val == last_pbs) { in ddr3_pbs_per_bit()
1340 pbs_curr_val; in ddr3_pbs_per_bit()
1392 pbs_curr_val; in ddr3_pbs_per_bit()
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H A Dddr3_sdram.c282 u32 pbs_curr_val, u32 pbs_lock_val, in ddr3_sdram_pbs_compare() argument
369 pbs_locked_value[val][dq] != pbs_curr_val) in ddr3_sdram_pbs_compare()
393 pbs_curr_val; in ddr3_sdram_pbs_compare()
409 pbs_locked_value[val][dq] != pbs_curr_val) in ddr3_sdram_pbs_compare()
414 pbs_locked_value[val][dq] = pbs_curr_val; in ddr3_sdram_pbs_compare()
H A Dddr3_hw_training.h330 u32 pbs_pattern_idx, u32 pbs_curr_val,