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Searched refs:mmVGT_CACHE_INVALIDATION (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1648 #define mmVGT_CACHE_INVALIDATION 0x2231 macro
H A Dgfx_7_2_d.h2366 #define mmVGT_CACHE_INVALIDATION 0x2231 macro
H A Dgfx_7_0_d.h2342 #define mmVGT_CACHE_INVALIDATION 0x2231 macro
H A Dgfx_8_0_d.h2606 #define mmVGT_CACHE_INVALIDATION 0x2231 macro
H A Dgfx_8_1_d.h2585 #define mmVGT_CACHE_INVALIDATION 0x2231 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c536 SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),
600 SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),
681 SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),
H A Dgfx_v6_0.c1742 WREG32(mmVGT_CACHE_INVALIDATION, in gfx_v6_0_constants_init()
H A Dgfx_v7_0.c1994 WREG32(mmVGT_CACHE_INVALIDATION, in gfx_v7_0_constants_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h279 #define mmVGT_CACHE_INVALIDATION macro
H A Dgc_9_2_1_offset.h271 #define mmVGT_CACHE_INVALIDATION macro
H A Dgc_9_1_offset.h277 #define mmVGT_CACHE_INVALIDATION macro
H A Dgc_10_1_0_offset.h2285 #define mmVGT_CACHE_INVALIDATION macro
H A Dgc_10_3_0_offset.h2360 #define mmVGT_CACHE_INVALIDATION macro