Home
last modified time | relevance | path

Searched refs:mmUNIPHYA_LINK_CNTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5929 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_3_0_3_offset.h5460 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_3_0_1_offset.h9107 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_1_0_offset.h10360 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_2_1_0_offset.h11328 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_3_0_2_offset.h11408 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_2_0_0_offset.h12741 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
H A Ddcn_3_0_0_offset.h12552 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1815 #define mmUNIPHYA_LINK_CNTL_BASE_IDX macro