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Searched refs:mmTPC5_RTR_HBW_RANGE_BASE_L_1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc5_rtr_regs.h216 #define mmTPC5_RTR_HBW_RANGE_BASE_L_1 0xF404C4 macro
/openbmc/linux/drivers/accel/habanalabs/goya/
H A Dgoya_security.c2991 WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); in goya_init_security()