Home
last modified time | relevance | path

Searched refs:mmRLC_GPM_SCRATCH_DATA (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3833 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3834 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3835 WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.clear_state_size); in gfx_v7_0_init_gfx_cgpg()
3839 WREG32(mmRLC_GPM_SCRATCH_DATA, 0); in gfx_v7_0_init_gfx_cgpg()
3844 WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.reg_list[i]); in gfx_v7_0_init_gfx_cgpg()
H A Dgfx_v9_0.c2583 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), in gfx_v9_1_init_rlc_save_restore_list()
2589 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
2593 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
2594 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
2598 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, j); in gfx_v9_1_init_rlc_save_restore_list()
2613 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), list_size); in gfx_v9_1_init_rlc_save_restore_list()
2619 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), in gfx_v9_1_init_rlc_save_restore_list()
H A Dgfx_v8_0.c3963 WREG32(mmRLC_GPM_SCRATCH_DATA, register_list_format[i]); in gfx_v8_0_init_save_restore_list()
3968 WREG32(mmRLC_GPM_SCRATCH_DATA, list_size); in gfx_v8_0_init_save_restore_list()
3974 WREG32(mmRLC_GPM_SCRATCH_DATA, in gfx_v8_0_init_save_restore_list()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1330 #define mmRLC_GPM_SCRATCH_DATA 0x312d macro
H A Dgfx_7_0_d.h1317 #define mmRLC_GPM_SCRATCH_DATA 0x312d macro
H A Dgfx_8_0_d.h1430 #define mmRLC_GPM_SCRATCH_DATA 0xec6d macro
H A Dgfx_8_1_d.h1427 #define mmRLC_GPM_SCRATCH_DATA 0xec6d macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6111 #define mmRLC_GPM_SCRATCH_DATA macro
H A Dgc_9_2_1_offset.h6311 #define mmRLC_GPM_SCRATCH_DATA macro
H A Dgc_9_1_offset.h6333 #define mmRLC_GPM_SCRATCH_DATA macro
H A Dgc_10_1_0_offset.h10483 #define mmRLC_GPM_SCRATCH_DATA macro
H A Dgc_10_3_0_offset.h10215 #define mmRLC_GPM_SCRATCH_DATA macro