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Searched refs:mmRIRB_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7139 #define mmRIRB_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h107 #define mmRIRB_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h155 #define mmRIRB_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h14875 #define mmRIRB_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h16067 #define mmRIRB_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h16599 #define mmRIRB_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h16757 #define mmRIRB_CONTROL_BASE_IDX … macro