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Searched refs:mmMPCC1_MPCC_OPP_ID_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3610 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h6131 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h10281 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_1_0_offset.h5398 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h5637 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h12505 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h6575 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h13790 #define mmMPCC1_MPCC_OPP_ID_BASE_IDX … macro