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Searched refs:mmMP1_SMN_C2PMSG_101 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu9_smumgr.c99 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_101, msg); in smu9_send_msg_to_smc_without_waiting()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h320 #define mmMP1_SMN_C2PMSG_101 … macro
H A Dmp_10_0_offset.h320 #define mmMP1_SMN_C2PMSG_101 … macro
H A Dmp_9_0_offset.h332 #define mmMP1_SMN_C2PMSG_101 0x02a5 macro
H A Dmp_11_0_8_offset.h320 #define mmMP1_SMN_C2PMSG_101 … macro
H A Dmp_11_0_offset.h322 #define mmMP1_SMN_C2PMSG_101 … macro
H A Dmp_11_5_0_offset.h320 #define mmMP1_SMN_C2PMSG_101 … macro