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Searched refs:mmMCIF_WB2_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h12565 #define mmMCIF_WB2_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h14697 #define mmMCIF_WB2_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h465 #define mmMCIF_WB2_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX … macro