Home
last modified time | relevance | path

Searched refs:mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5198 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4634 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h7495 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h7812 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h9372 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9048 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10411 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10128 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h9697 #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX … macro