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Searched refs:mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5719 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h9717 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h11625 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11703 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h13755 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12859 #define mmDSC_TOP1_DSC_DEBUG_CONTROL_BASE_IDX … macro