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Searched refs:mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1466 #define mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX … macro
H A Ddcn_1_0_offset.h3545 #define mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h3397 #define mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h4335 #define mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX … macro