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Searched refs:mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5229 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_3_0_3_offset.h4688 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_3_0_1_offset.h7577 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_1_0_offset.h7922 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_2_1_0_offset.h9468 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_3_0_2_offset.h9144 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_2_0_0_offset.h10521 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
H A Ddcn_3_0_0_offset.h10238 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h9807 #define mmDP_AUX0_AUX_INTERRUPT_CONTROL_BASE_IDX macro