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Searched refs:mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h35 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h124 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h211 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_1_0_offset.h475 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h163 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h147 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h149 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h131 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h667 #define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro