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Searched refs:mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h4640 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL 0x4ddd macro
H A Ddce_11_2_d.h5872 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL 0x4ddd macro
H A Ddce_12_0_offset.h11152 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h9040 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_1_0_offset.h9379 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_2_1_0_offset.h10943 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_3_0_2_offset.h10662 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_2_0_0_offset.h12030 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_3_0_0_offset.h11798 #define mmDP3_DP_DPHY_HBR2_PATTERN_CONTROL macro