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Searched refs:mmDCPG_INTERRUPT_CONTROL_3 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h468 #define mmDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_2_1_0_offset.h524 #define mmDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_0_2_offset.h436 #define mmDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_2_0_0_offset.h562 #define mmDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_0_0_offset.h448 #define mmDCPG_INTERRUPT_CONTROL_3 … macro