Searched refs:mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV (Results 1 – 2 of 2) sorted by relevance
47 #define mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV 0x411E048 macro
5255 WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV, 0); in gaudi2_init_sm()7473 WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV + dcore_offset, asid); in gaudi2_mmu_dcore_prepare()