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Searched refs:mmCRTC8_IDX_1 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h95 #define mmCRTC8_IDX_1 macro
H A Ddcn_3_0_1_offset.h76 #define mmCRTC8_IDX_1 macro
H A Ddcn_1_0_offset.h124 #define mmCRTC8_IDX_1 macro
H A Ddcn_2_1_0_offset.h76 #define mmCRTC8_IDX_1 macro
H A Ddcn_3_0_2_offset.h110 #define mmCRTC8_IDX_1 macro
H A Ddcn_2_0_0_offset.h110 #define mmCRTC8_IDX_1 macro
H A Ddcn_3_0_0_offset.h92 #define mmCRTC8_IDX_1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h632 #define mmCRTC8_IDX_1 macro