Searched refs:mmCP_RB_DOORBELL_CONTROL (Results 1 – 10 of 10) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_0_d.h | 266 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
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| H A D | gfx_8_1_d.h | 267 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 6043 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v10_0_cp_gfx_set_doorbell()
6053 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v10_0_cp_gfx_set_doorbell()
6412 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v10_0_gfx_mqd_init()
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| H A D | gfx_v8_0.c | 4210 tmp = RREG32(mmCP_RB_DOORBELL_CONTROL); in gfx_v8_0_set_cpg_door_bell()
4223 WREG32(mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v8_0_set_cpg_door_bell()
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| H A D | gfx_v9_0.c | 3141 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v9_0_cp_gfx_resume()
3150 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v9_0_cp_gfx_resume()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2434 #define mmCP_RB_DOORBELL_CONTROL … macro
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| H A D | gc_9_2_1_offset.h | 2649 #define mmCP_RB_DOORBELL_CONTROL … macro
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| H A D | gc_9_1_offset.h | 2711 #define mmCP_RB_DOORBELL_CONTROL … macro
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| H A D | gc_10_1_0_offset.h | 5033 #define mmCP_RB_DOORBELL_CONTROL … macro
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| H A D | gc_10_3_0_offset.h | 4692 #define mmCP_RB_DOORBELL_CONTROL … macro
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