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Searched refs:mmCP_RB_ACTIVE (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2466 #define mmCP_RB_ACTIVE macro
H A Dgc_9_2_1_offset.h2681 #define mmCP_RB_ACTIVE macro
H A Dgc_9_1_offset.h2743 #define mmCP_RB_ACTIVE macro
H A Dgc_10_1_0_offset.h5137 #define mmCP_RB_ACTIVE macro
H A Dgc_10_3_0_offset.h4800 #define mmCP_RB_ACTIVE macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c6133 WREG32_SOC15(GC, 0, mmCP_RB_ACTIVE, 1); in gfx_v10_0_cp_gfx_resume()