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Searched refs:mmCOMPUTE_PGM_RSRC2 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h334 #define mmCOMPUTE_PGM_RSRC2 0x2E13 macro
H A Dgfx_7_2_d.h1218 #define mmCOMPUTE_PGM_RSRC2 0x2e13 macro
H A Dgfx_7_0_d.h1205 #define mmCOMPUTE_PGM_RSRC2 0x2e13 macro
H A Dgfx_8_0_d.h1300 #define mmCOMPUTE_PGM_RSRC2 0x2e13 macro
H A Dgfx_8_1_d.h1303 #define mmCOMPUTE_PGM_RSRC2 0x2e13 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c4201 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x400000 }, /* 64KB LDS */
4218 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x400000 }, /* 64KB LDS */
4235 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x0 },
4252 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x0 },
H A Dgfx_v8_0.c1404 mmCOMPUTE_PGM_RSRC2, 20,
1425 mmCOMPUTE_PGM_RSRC2, 20,
1446 mmCOMPUTE_PGM_RSRC2, 20,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2216 #define mmCOMPUTE_PGM_RSRC2 macro
H A Dgc_9_2_1_offset.h2435 #define mmCOMPUTE_PGM_RSRC2 macro
H A Dgc_9_1_offset.h2501 #define mmCOMPUTE_PGM_RSRC2 macro
H A Dgc_10_1_0_offset.h4573 #define mmCOMPUTE_PGM_RSRC2 macro
H A Dgc_10_3_0_offset.h4232 #define mmCOMPUTE_PGM_RSRC2 macro