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Searched refs:mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1674 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h2854 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h3665 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h3605 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h4210 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h4543 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h4257 #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX … macro