/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | si.c | 62 mmCB_HW_CONTROL, 0x00010000, 0x00018208, 118 mmCB_HW_CONTROL, 0x00010000, 0x00018208, 301 mmCB_HW_CONTROL, 0x00010000, 0x00018208, 339 mmCB_HW_CONTROL, 0x00010000, 0x00018208, 386 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
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H A D | mxgpu_vi.c | 230 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
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H A D | gfx_v9_0.c | 545 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0x0000f000, 0x00012107), 582 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104), 622 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104), 644 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104), 688 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
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H A D | gfx_v8_0.c | 199 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208, 310 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208, 341 mmCB_HW_CONTROL, 0x0000f3cf, 0x00007208, 373 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
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H A D | gfx_v7_0.c | 1972 tmp = RREG32(mmCB_HW_CONTROL) & ~0x00010000; in gfx_v7_0_constants_init() 1974 WREG32(mmCB_HW_CONTROL, tmp); in gfx_v7_0_constants_init()
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
H A D | gfx_6_0_d.h | 277 #define mmCB_HW_CONTROL 0x2684 macro
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H A D | gfx_7_2_d.h | 138 #define mmCB_HW_CONTROL 0x2684 macro
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H A D | gfx_7_0_d.h | 138 #define mmCB_HW_CONTROL 0x2684 macro
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H A D | gfx_8_0_d.h | 155 #define mmCB_HW_CONTROL 0x2684 macro
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H A D | gfx_8_1_d.h | 155 #define mmCB_HW_CONTROL 0x2684 macro
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 1043 #define mmCB_HW_CONTROL … macro
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H A D | gc_9_2_1_offset.h | 979 #define mmCB_HW_CONTROL … macro
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H A D | gc_9_1_offset.h | 1013 #define mmCB_HW_CONTROL … macro
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H A D | gc_10_1_0_offset.h | 2959 #define mmCB_HW_CONTROL … macro
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H A D | gc_10_3_0_offset.h | 2926 #define mmCB_HW_CONTROL … macro
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