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Searched refs:misa_mxl_max (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dgdbstub.c65 switch (mcc->misa_mxl_max) { in riscv_cpu_gdb_read_register()
85 switch (mcc->misa_mxl_max) { in riscv_cpu_gdb_write_register()
347 switch (mcc->misa_mxl_max) { in riscv_cpu_register_gdb_regs_for_features()
H A Dcpu.c333 return 16 << mcc->misa_mxl_max; in riscv_cpu_max_xlen()
948 env->misa_mxl = mcc->misa_mxl_max; in riscv_cpu_reset_hold()
1330 env->misa_mxl = mcc->misa_mxl_max; in riscv_cpu_init()
1420 switch (mcc->misa_mxl_max) { in riscv_cpu_validate_misa_mxl()
2785 mcc->misa_mxl_max = (uint32_t)(uintptr_t)data; in riscv_cpu_class_init()
2881 #define DEFINE_CPU(type_name, misa_mxl_max, initfn) \ argument
2887 .class_data = (void *)(misa_mxl_max) \
2890 #define DEFINE_DYNAMIC_CPU(type_name, misa_mxl_max, initfn) \ argument
2896 .class_data = (void *)(misa_mxl_max) \
2899 #define DEFINE_VENDOR_CPU(type_name, misa_mxl_max, initfn) \ argument
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H A Dtranslate.c64 RISCVMXL misa_mxl_max; member
164 #define get_xl_max(ctx) ((ctx)->misa_mxl_max)
1233 ctx->misa_mxl_max = mcc->misa_mxl_max; in riscv_tr_init_disas_context()
H A Dmachine.c183 return mcc->misa_mxl_max == MXL_RV128; in rv128_needed()
H A Dcpu.h514 uint32_t misa_mxl_max; /* max mxl for this cpu */ member
/openbmc/qemu/hw/riscv/
H A Dboot.c40 return mcc->misa_mxl_max == MXL_RV32; in riscv_is_32bit()
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c557 if (mcc->misa_mxl_max != MXL_RV32 && cpu->cfg.ext_zcf) { in riscv_cpu_validate_set_extensions()
828 if (riscv_has_ext(env, RVF) && mcc->misa_mxl_max == MXL_RV32) { in cpu_enable_zc_implied_rules()
837 if (riscv_has_ext(env, RVF) && mcc->misa_mxl_max == MXL_RV32) { in cpu_enable_zc_implied_rules()
/openbmc/qemu/target/riscv/kvm/
H A Dkvm-cpu.c1979 mcc->misa_mxl_max = MXL_RV32; in riscv_host_cpu_class_init()
1981 mcc->misa_mxl_max = MXL_RV64; in riscv_host_cpu_class_init()