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Searched refs:min_write_to_read_cmd_delay (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_spd.c170 u32 min_write_to_read_cmd_delay; /* DDR3/2 only */ member
444 info->min_write_to_read_cmd_delay = spd_data[SPD_TWTR_BYTE] * time_base; in ddr3_spd_init()
446 info->min_write_to_read_cmd_delay, 1); in ddr3_spd_init()
547 if (sum_info->min_write_to_read_cmd_delay < in ddr3_spd_sum_init()
548 info->min_write_to_read_cmd_delay) in ddr3_spd_sum_init()
549 sum_info->min_write_to_read_cmd_delay = in ddr3_spd_sum_init()
550 info->min_write_to_read_cmd_delay; in ddr3_spd_sum_init()
559 if (sum_info->min_write_to_read_cmd_delay < in ddr3_spd_sum_init()
560 info->min_write_to_read_cmd_delay) in ddr3_spd_sum_init()
561 sum_info->min_write_to_read_cmd_delay = in ddr3_spd_sum_init()
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