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Searched refs:miimdev (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/
H A Dphy.c10 u32 miimdev, in mscc_phy_rd_wr() argument
30 writel(data, BASE_DEVCPU_GCB + MIIM_MII_CMD(miimdev)); in mscc_phy_rd_wr()
39 data = readl(BASE_DEVCPU_GCB + MIIM_MII_STATUS(miimdev)); in mscc_phy_rd_wr()
40 debug("Read status miim(%d): 0x%08x\n", miimdev, data); in mscc_phy_rd_wr()
44 data = readl(BASE_DEVCPU_GCB + MIIM_MII_DATA(miimdev)); in mscc_phy_rd_wr()
56 int mscc_phy_rd(u32 miimdev, in mscc_phy_rd() argument
61 if (mscc_phy_rd_wr(1, miimdev, miim_addr, addr, value) == 0) in mscc_phy_rd()
67 int mscc_phy_wr(u32 miimdev, in mscc_phy_wr() argument
72 return mscc_phy_rd_wr(0, miimdev, miim_addr, addr, &value); in mscc_phy_wr()