Searched refs:mhpmevent_val (Results 1 – 4 of 4) sorted by relevance
154 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_MINH)) || in riscv_pmu_incr_ctr_rv64()171 env->mhpmevent_val[ctr_idx] |= MHPMEVENT_BIT_OF; in riscv_pmu_incr_ctr_rv64()425 target_ulong mhpmevent_val; in pmu_hpmevent_is_of_set() local429 mhpmevent_val = env->mhpmeventh_val[ctr_idx]; in pmu_hpmevent_is_of_set()432 mhpmevent_val = env->mhpmevent_val[ctr_idx]; in pmu_hpmevent_is_of_set()436 return get_field(mhpmevent_val, of_bit_mask); in pmu_hpmevent_is_of_set()441 target_ulong *mhpmevent_val; in pmu_hpmevent_set_of_if_clear() local445 mhpmevent_val = &env->mhpmeventh_val[ctr_idx]; in pmu_hpmevent_set_of_if_clear()448 mhpmevent_val = &env->mhpmevent_val[ctr_idx]; in pmu_hpmevent_set_of_if_clear()452 if (!get_field(*mhpmevent_val, of_bit_mask)) { in pmu_hpmevent_set_of_if_clear()[all …]
404 VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),
383 target_ulong mhpmevent_val[RV_MAX_MHPMEVENTS]; member
940 *val = env->mhpmevent_val[evt_index]; in read_mhpmevent()953 env->mhpmevent_val[evt_index] = val; in write_mhpmevent()965 env->mhpmevent_val[evt_index] = mhpmevt_val; in write_mhpmevent()988 uint64_t mhpmevt_val = env->mhpmevent_val[evt_index]; in write_mhpmeventh()1028 env->mhpmevent_val[counter_idx]; in riscv_pmu_ctr_get_fixed_counters_val()1206 mhpm_evt_val = env->mhpmevent_val; in read_scountovf()