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/openbmc/qemu/target/mips/sysemu/
H A Dcp0.c69 uint32_t ksux = (1 << CP0St_KX) & val; in cpu_mips_store_status() local
70 ksux |= (ksux >> 1) & val; /* KX = 0 forces SX to be 0 */ in cpu_mips_store_status()
71 ksux |= (ksux >> 1) & val; /* SX = 0 forces UX to be 0 */ in cpu_mips_store_status()
72 val = (val & ~(7 << CP0St_UX)) | ksux; in cpu_mips_store_status()