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Searched refs:khz_to_mhz_ceil (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr_vbios_smu.c148 khz_to_mhz_ceil(requested_dispclk_khz)); in rn_vbios_smu_set_dispclk()
157 ASSERT(actual_dispclk_set_mhz >= khz_to_mhz_ceil(requested_dispclk_khz)); in rn_vbios_smu_set_dispclk()
169 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rn_vbios_smu_set_dprefclk()
186 khz_to_mhz_ceil(requested_dcfclk_khz)); in rn_vbios_smu_set_hard_min_dcfclk()
205 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in rn_vbios_smu_set_min_deep_sleep_dcfclk()
215 khz_to_mhz_ceil(requested_phyclk_khz)); in rn_vbios_smu_set_phyclk()
225 khz_to_mhz_ceil(requested_dpp_khz)); in rn_vbios_smu_set_dppclk()
227 ASSERT(actual_dppclk_set_mhz >= khz_to_mhz_ceil(requested_dpp_khz)); in rn_vbios_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.c151 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn301_smu_set_dispclk()
165 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn301_smu_set_dprefclk()
181 khz_to_mhz_ceil(requested_dcfclk_khz)); in dcn301_smu_set_hard_min_dcfclk()
199 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn301_smu_set_min_deep_sleep_dcfclk()
213 khz_to_mhz_ceil(requested_dpp_khz)); in dcn301_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.c168 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn31_smu_set_dispclk()
183 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn31_smu_set_dprefclk()
203 khz_to_mhz_ceil(requested_dcfclk_khz)); in dcn31_smu_set_hard_min_dcfclk()
225 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn31_smu_set_min_deep_sleep_dcfclk()
240 khz_to_mhz_ceil(requested_dpp_khz)); in dcn31_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c267 pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->fclk_khz)); in rv1_update_clocks()
268 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
269 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks()
287 pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->fclk_khz)); in rv1_update_clocks()
288 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
289 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks()
H A Drv1_clk_mgr_vbios_smu.c136 khz_to_mhz_ceil(requested_dispclk_khz)); in rv1_vbios_smu_set_dispclk()
154 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rv1_vbios_smu_set_dprefclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c186 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn314_smu_set_dispclk()
201 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn314_smu_set_dprefclk()
221 khz_to_mhz_ceil(requested_dcfclk_khz)); in dcn314_smu_set_hard_min_dcfclk()
245 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn314_smu_set_min_deep_sleep_dcfclk()
260 khz_to_mhz_ceil(requested_dpp_khz)); in dcn314_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.c172 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn316_smu_set_dispclk()
190 khz_to_mhz_ceil(requested_dcfclk_khz)); in dcn316_smu_set_hard_min_dcfclk()
212 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn316_smu_set_min_deep_sleep_dcfclk()
227 khz_to_mhz_ceil(requested_dpp_khz)); in dcn316_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.c198 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn315_smu_set_dispclk()
216 khz_to_mhz_ceil(requested_dcfclk_khz)); in dcn315_smu_set_hard_min_dcfclk()
238 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn315_smu_set_min_deep_sleep_dcfclk()
253 khz_to_mhz_ceil(requested_dpp_khz)); in dcn315_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c220 < khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz)) in dcn32_init_clocks()
222 = khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz); in dcn32_init_clocks()
231 < khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz)) in dcn32_init_clocks()
233 = khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz); in dcn32_init_clocks()
383 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(temp_dispclk_khz)); in dcn32_update_clocks_update_dentist()
422 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(clk_mgr->base.clks.dispclk_… in dcn32_update_clocks_update_dentist()
516 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_kh… in dcn32_update_clocks()
593 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz… in dcn32_update_clocks()
611 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DPPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_kh… in dcn32_update_clocks()
631 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DTBCLK, khz_to_mhz_ceil(new_clocks->ref_dtbclk_khz)); in dcn32_update_clocks()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c236 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_k… in dcn3_update_clocks()
241 …dcn30_smu_set_min_deep_sleep_dcef_clk(clk_mgr, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_slee… in dcn3_update_clocks()
283 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz… in dcn3_update_clocks()
290 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_kh… in dcn3_update_clocks()
296 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dispclk_… in dcn3_update_clocks()
365 khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn3_set_hard_min_memclk()
484 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PHYCLK, khz_to_mhz_ceil(clk_mgr_base->clks.phyclk_kh… in dcn30_notify_link_rate_change()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c265 …pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz… in dcn2_update_clocks()
272 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_… in dcn2_update_clocks()
278 …pp_smu->set_hard_min_socclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.socclk_khz… in dcn2_update_clocks()
293 …pp_smu->set_hard_min_uclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)… in dcn2_update_clocks()
318 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_DISPCLK, khz_to_mhz_ceil(clk_mgr_base->clks… in dcn2_update_clocks()
513 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PHYCLK, khz_to_mhz_ceil(clk_mgr_base->clks.… in dcn2_notify_link_rate_change()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr_internal.h377 static inline int khz_to_mhz_ceil(int khz) in khz_to_mhz_ceil() function