Searched refs:intisr (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/hw/intc/ |
H A D | loongarch_pch_pic.c | 29 s->intisr |= MAKE_64BIT_MASK(irq, 1); in pch_pic_update_irq() 37 val = mask & s->intisr & ~s->intirr; in pch_pic_update_irq() 40 s->intisr &= ~MAKE_64BIT_MASK(irq, 1); in pch_pic_update_irq() 181 s->intisr &= (~data); in loongarch_pch_pic_low_writew() 189 s->intisr &= (~value); in loongarch_pch_pic_low_writew() 217 val = (uint32_t)(s->intisr & (~s->int_mask)); in loongarch_pch_pic_high_readw() 220 val = (s->intisr & (~s->int_mask)) >> 32; in loongarch_pch_pic_high_readw() 247 s->intisr = get_writew_val(s->intisr, data, 0); in loongarch_pch_pic_high_writew() 250 s->intisr = get_writew_val(s->intisr, data, 1); in loongarch_pch_pic_high_writew() 377 s->intisr = 0x0; in loongarch_pch_pic_reset() [all …]
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/openbmc/linux/arch/mips/mti-malta/ |
H A D | malta-int.c | 88 unsigned int pcimstat, intisr, inten, intpol; in corehi_irqdispatch() local 121 intisr = BONITO_INTISR; in corehi_irqdispatch() 127 pr_emerg("BONITO_INTISR = %08x\n", intisr); in corehi_irqdispatch()
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/openbmc/qemu/include/hw/intc/ |
H A D | loongarch_pch_pic.h | 55 uint64_t intisr; /* 0x3a0 interrupt service register */ member
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